transistor base

英 [trænˈzɪstə(r) beɪs] 美 [trænˈzɪstər beɪs]

晶体管基极

计算机



双语例句

  1. A transistor has three electrodes, the emitter, the base and the collector.
    晶体管有三个电极,即发射极、基极和集电集。
  2. Construction and Application of the Multi-channel Electrophysiological Recording System; A transistor has three electrodes, the emitter, the base and the collector.
    多电极电生理系统建立、完善及应用晶体管有三个电极,即发射极、基极和集电集。
  3. Regardless of type NPN or PNP-type tubes, the internal transistor has three areas, namely, the launch area, base, collector area, the three areas form two PN junction.
    无论NPN型还是PNP型管,三极管内部均有三个区、即发射区、基区、集电区,三个区形成两个PN结。
  4. The Test System For Thermal Resistance Of Power Transistor base on Virtual Instrument
    基于虚拟仪器的功率三极管热阻测试系统
  5. For example, a transistor is a controllable switch, but it is directional between the collector and emitter, and it has interactive control between the base and emitter.
    例如,晶体管是可控的开关,但它在集电极和发射极之间是定向的,并且在基极和发射极之间是配合控制的。
  6. Power transistor base drive circuit
    功率晶体管基极驱动电路
  7. Microwave High-Power Transistor Base Ballast Method Research
    微波大功率晶体管基极镇流方法研究
  8. A planar SiGe heterojunction bipolar transistor was fabricated using polysilicon emitter technology and SiGe base grown by Molecular Beam Epitaxy ( MBE).
    利用多晶硅发射极技术与分子束外延生长SiGe基区技术相结合,研制成适于集成的平面结构、发射结面积为3μm×8μm的SiGe异质结双极晶体管(HBT)。
  9. The resistor and transistor base doping has been accomplished by implanted boron, while the emitter doping by implanted phosphorus.
    电阻器和晶体管基区的掺杂由注入硼来实现,发射区的掺杂则靠注入磷来完成。
  10. Energy gap and minority-carrier recombination lifetime are important physical parameters in the emitter of silicon transistor. A structure of a sub-100 nm base width silicon transistor has been described in this paper.
    禁带宽度和少子复合寿命是硅晶体管发射区中重要的物理参数。本文描述了一种实现亚100nm基区宽度的晶体管结构。
  11. Essentially, the structure of linear magnetic field sensor is same as a bipolar lateral transistor with twin base and twin collector.
    其结构为横向双基极、双集电极晶体管,器件对磁场呈线性响应。
  12. In this paper, the work is introduced on investigation on non classical CMOS structure in the quest to find the ultimate transistor structure that will permit evolutionary improvements of the existing CMOS technology base.
    主要介绍了对各种非典型CMOS结构的研究,从而寻求最终的结构模式适应不断变化的CMOS发展技术。
  13. Establishment of Prediction Formula for Transistor Base Failure Rate of China
    晶体管基本失效率预计公式的建立
  14. In the paper the recent development of static induction transistor, charge modulation devices, buck charge modulated device, base stored image sensor, amplified MOS image and CMOS active pixel sensors are emphatically described.
    主要介绍静电感应晶体管、电荷调制器件、体电荷调制器件、基极存储图象传感器、增强MOS图象、CMOS等有源象素图象传感器的新进展。
  15. Based on the analyzing and studying carrier transport of SiGe HBT ( heterojunction bipolar transistor), a model of the emitter delay time τ_e, including base extending effect, is established.
    在对SiGeHBT(异质结双极晶体管)载流子输运的研究基础上,建立了包括基区扩展效应SiGeHBT发射极延迟时间τe模型。
  16. A theoretical model is presented to determine the current dependence of base resistance RB ( IB) of bipolar transistor at high current, based on the effect of base conductivity modulation.
    本文针对基极电阻随电流变化的实验事实,根据基区电导调制效应,提出了工作在大电流密度水平时,基极电阻RB(IB)的理论模型;
  17. The empirical formulae are developed to compute the breakdown voltage of transistor with the base open quickly and quite exactly.
    根据数值计算结果找到了快速、精确计算基极开路晶体管击穿电压的经验公式。
  18. The Method of Increasing the Switching Frequency of Transistor Inverter-The Design of Optimal Base Current and Saturation Control Circuit
    提高脉冲逆变器开关频率的技术&最佳基极驱动电流和抗饱和电路的设计
  19. A Model for the Technique Parameter Calculation of Up-diffused I~ 2L NPN Transistor Base
    上扩散I~2L电路中纵向npn管基区工艺参数的近似计算模型
  20. Its configuration is similar to a conventional transistor with the exception of the addition of a v or π layer ( transition region) between collector and base regions and it is operated as a diode.
    除在收集结与基区之间插入了一个v型或π型渡越区外,器件的结构与通常晶体管的很相似,但它是作为两端器件运用的。
  21. The edge crowding effect of emitter current in a transistor caused by self bias of base resistor is one of the factors to limit its capability of loaded current.
    由基区电阻的自偏压引起的晶体管发射极电流集边效应,是限制晶体管承载电流能力的因素之一〔1~4〕。